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Signal Processing and Communications
Guidelines for using these images: Please use the associated caption and credit the image "Courtesy of The MathWorks, Inc."
Simulink® Fixed Point™| A 10-bit receiver for an ultra wideband wireless communications system, modeled in Simulink® and the Signal Processing Blockset™. Simulink® Fixed Point™ enables fixed-point simulation to study the effects of limited range and precision on the receiver's performance. A high-resolution image can be downloaded in JPG and TIFF formats. |
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RF Blockset™
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The RF Blockset™ integrates with the RF Toolbox™ and the Communications Blockset™ (available separately) to simulate the effect of RF impairments and architectures on system performance. A high-resolution image can be downloaded in JPG and TIFF formats. |
Video and Image Processing Blockset™
The tracking cars model created with the Video and Image Processing Blockset™ uses an optical flow estimation technique to estimate the motion vectors in each frame of the video sequence. The counter in the upper left corner of the Results window tracks the number of cars in the region of interest. A high-resolution image can be downloaded in JPG and TIFF formats. |
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Simulink® Verification and Validation™
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The verification manager extends the Simulink Signal Builder by enabling you to associate verification blocks with test cases and link them back to requirements. A high-resolution image can be downloaded in JPG and TIFF formats. |
Communications Blockset™
Example of different visualization options of a Three-Path Rayleigh Fading channel using the new channel visualization tool in the Communications Blockset™ 3. A high-resolution image can be downloaded in JPG and TIFF formats. |
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EDA Simulator Link™ IN
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Simulink® and Incisive®
communicate via a fast, bidirectional cosimulation interface. A high-resolution image can be downloaded in JPG and TIFF formats. |
EDA Simulator Link™ MQ
EDA Simulator Link™ MQ from The MathWorks integrates MATLAB® and Simulink® into the hardware design flow for FPGA, ASIC, and SoC development, enabling users to cosimulate and verify VHDL and Verilog using ModelSim® from Mentor Graphics. A high-resolution image can be downloaded in JPG and TIFF formats. |
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RF Toolbox™
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RF Toolbox™ from The
MathWorks now enables signal integrity engineers to design,
model, analyze, and visualize networks of radio frequency components. A high-resolution image can be downloaded in JPG and TIFF formats. |
Embedded IDE Link™ CC
Embedded IDE Link™ CC from The MathWorks enables developers to debug, verify, and validate embedded software on TI DSPs directly from MATLAB® and Simulink®. Shown here is an example of system-level verification of a video edge detection system in a Simulink test bench with DSP code executing on a TI C6713DSP and the reference model executing simultaneously in Simulink. A high-resolution image can be downloaded in JPG and TIFF formats. |
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Simulink® HDL Coder™
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Simulink® HDL
Coder™ from The MathWorks generates target-independent, bit-true,
cycle-accurate, synthesizable Verilog and VHDL code from Simulink
and Stateflow®. A high-resolution image can be downloaded in JPG and TIFF formats. |
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