HDL Coder

Key Features

  • Target-independent, synthesizable VHDL and Verilog code
  • Code generation support for MATLAB functions, System objects, and Simulink blocks
  • Mealy and Moore finite-state machines and control logic implementations using Stateflow
  • Workflow advisor for programming Xilinx and Altera application boards
  • Resource sharing and retiming for area-speed tradeoffs
  • Code-to-model and model-to-code traceability for DO-254
  • Legacy code integration
Generating HDL code from MATLAB or Simulink with HDL Coder.
Generating HDL code from MATLAB or Simulink with HDL Coder. You can generate synthesizable VHDL and Verilog code from MATLAB functions, Simulink models, or a combination of the two.
Next: Generating HDL Code

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Implementation of FPGA-Based Channelizers with MATLAB and Simulink

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Learn to Go from Simulink to FPGA/ASIC Using HDL Code

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